Wafer probe testing technology has evolved alongside semiconductor manufacturing processes and continues to be widely utilized. Testing the quality of bare dies before completing the packaging process can help avoid the cost of packaging defective units. In recent years, with advancements in semiconductor manufacturing technology, integrated circuit (IC) sizes have been shrinking, functionalities have been increasing, and pin counts have been rising. The traditional epoxy ring probe card assembly for chip testing is no longer sufficient for meeting current demands. Instead, there is a growing demand for high-density vertical probe cards. The development of "High Density Vertical Probe Cards" and "High-Frequency GSG Probes" based on Micro-Electro-Mechanical Systems (MEMS) focuses on testing bare dies to reduce losses caused by bad dies after packaging. These feature multi-layer thick photoresist and electroplating methods to produce high-density, high-precision vertical probe cards, thereby reducing the cost of high-priced precision probe cards through process modifications.
Current trends emphasize lightweight, compact designs to reduce chip packaging area and improve IC performance. Flip Chip packaging has become prevalent in graphics ICs, chipsets in Multi-Chip Modules (MCMs), memory products, or CPU packaging. These advanced packaging methods come with high costs. Testing chips before packaging to identify and mark bad dies on the wafer, then discarding them before the final packaging process, can save unnecessary packaging costs.
The primary purpose of probe cards is to establish direct contact between the probes on the card and the solder pads or bumps on the chip, thereby extracting chip signals. This, coupled with peripheral testing equipment and software control, achieves automated measurements. Probe cards can be classified into horizontal and vertical types based on probe arrangement. Horizontal types can further be divided into array and edge types. The third type, vertical probe cards, resemble array-type probe cards but feature denser probe arrangements, allowing for more applications of solder pads or bumps. Vertical arrangements offer higher probe density and enable simultaneous testing of multiple chips, among other advantages.
The choice of probe material must complement the material of the chip solder pads or bumps. Commonly used probe metals include tungsten (W), beryllium copper (BeCu), and palladium alloy (Pd). Tungsten offers high strength and can easily penetrate the aluminum oxide layer on solder pads or bumps, reducing contact impedance. However, it is destructive and unsuitable for thin-film testing scenarios. Beryllium copper alloys are typically used on gold-plated chip solder pads or bumps, providing lower contact impedance than tungsten but with inferior hardness, resulting in faster wear. Palladium alloys share similar properties with beryllium copper alloys, offering lower contact impedance than tungsten. The significant advantage is the ability to produce probes via electroplating.
The market for probe cards is mostly driven by the growing complexity of semiconductor devices. Many functions, including sensors, processors, and communication modules, are combined onto a single chip in modern electronic systems. This intricacy makes thorough testing necessary in order to find and fix any possible flaws or performance problems. In order to precisely evaluate the electrical properties and functionality of a semiconductor device across its many components and guarantee the overall quality of the integrated circuits, probe cards are essential to this testing procedure. As new technologies like 5G, the Internet of Things (IoT), and artificial intelligence require sophisticated testing methodologies to meet strict performance standards, the proliferation of applications in these areas is driving the market for probe cards to grow steadily. The global Probe Card Market was valued at in 2022 and is anticipated to reach by 2029, witnessing a CAGR of 6.5% during the forecast period 2023-2029.